Home

Awesome

THIS PAGE IS NOW ARCHIVED - to make any additions or changes, please send email to content@riscv.org

RISC-V Cores and SoC Overview

This document captures the status of various cores and SoCs that endeavor to implement the RISC-V specification. Note that none of these cores/SoCs have passed the in-development RISC-V compliance suite.

Please add to the list and fix inaccuracies - see our CONTRIBUTING file for details.

Cores

NameSupplierLinksCapabilityPriv. specUser specPrimary LanguageLicense
AvispadoSemiDynamicsWebsiteRV641.10RV64GC, 2.2, multicore, V-readySystemVerilogCommercial License
AtrevidoSemiDynamicsWebsiteRV641.10RV64GC, 2.2, multicore, V-readySystemVerilogCommercial License
RV32EC_P2IQonIC WorksWebsiteRV321.11RV32E[M]C/RV32I[M]CSystemVerilogIQonIC Works Commercial License
RV32IC_P5IQonIC WorksWebsiteRV321.11RV32I[M][N][A]CSystemVerilogIQonIC Works Commercial License
RV32EC_FMP5IQonIC WorksWebsiteRV32CustomRV32ECSystemVerilogIQonIC Works Commercial License
rocketSiFive, UCB BarGitHubRV321.11-draft2.3-draftChiselBSD
freedomSiFiveGitHubRV32,RV641.11-draft2.3-draftChiselBSD
Berkeley Out-of-Order Machine (BOOM)UCB BARWebsite,GitHubRV641.11-draft2.3-draftChiselBSD
CV32E40POpenHW GroupGitHubRV321.11RV32IM[F]CSystemVerilogSolderpad Hardware License v. 0.51
Ibex (formerly Zero-riscy)lowRISCGitHubRV321.11RV32I[M]C/RV32E[M]CSystemVerilogApache 2.0
CVA6OpenHW GroupGitHubRV32,RV641.11RV[32/64]GCSystemVerilogSolderpad Hardware License v. 0.51
Riscy ProcessorsMIT CSAIL CSGWebsite,GitHubRV32,RV64BluespecMIT
RiscyOOMIT CSAIL CSGGitHubRV641.10RV64IMAFDBluespecMIT
LizardCornell CSL BRGGitHubRV64RV64IMPyMTLBSD
MinervaLambdaConceptGitHubRV321.10RV32InMigenBSD
OPenV/mriscvOnChipUISGitHubRV32RV32I(?)VerilogMIT
VexRiscvSpinalHDLGitHubRV321.10RV32I/E[M][A][F[D]][C]SpinalHDLMIT
VexRiscv Plugins for B and KRomain DolbeauGitHubRV32N/ARV32[B][K] for the VexRiscV coreSpinalHDLMIT
Roa Logic RV12Roa LogicGitHubRV321.9.12.1SystemVerilogNon-Commercial License
SCR1SyntacoreGitHubRV321.102.2, RV32I/E[MC]SystemVerilogSHL v. 2.0
SCR3SyntacoreWebsiteRV32,RV641.10RV[32/64]IMC[A], 2.2, milticoreSystemVerilogcommercial
SCR4SyntacoreWebsiteRV32,RV641.10RV[32/64]IMCF[DA], 2.2, milticoreSystemVerilogcommercial
SCR5SyntacoreWebsiteRV32,RV641.10RV[32/64]IMC[FDA], 2.2, milticoreSystemVerilogcommercial
SCR7SyntacoreWebsiteRV641.10RV64GC, 2.2, milticoreSystemVerilogcommercial
Hummingbird E200Bob HuGitHubRV321.102.2, RV32IMACVerilogApache 2.0
ShaktiIIT MadrasWebsite,GitLabRV641.112.2, RV64IMAFDCBluespecBSD
ReonVLucas CastroGitHubRV32VHDLGPL v3
PicoRV32Clifford WolfGitHubRV32RV32I/E[MC]VerilogISC
MR1Tom VerbeureGitHubRV32RV32ISpinalHDLUnlicense
SERVOlof KindgrenGitHubRV32RV32IVerilogISC
SweRV EH1Western Digital CorporationGitHubRV321.112.1, RV32IMCSystemVerilogApache 2.0
SweRV EL2Western Digital CorporationGitHubRV321.112.1, RV32IMCSystemVerilogApache 2.0
SweRV EH2Western Digital CorporationGitHubRV321.112.1, RV32IMACSystemVerilogApache 2.0
biRISC-VUltraEmbeddedGitHubRV321.11RV32I[M]VerilogApache 2.0
Reve-RGavin StarkGitHubRV321.10RV32IMACCDLApache 2.0
L10CodasipWebsiteRV321.0RV32EMCVerilogCodasip EULA
L30CodasipWebsiteRV321.0RV32IMCVerilogCodasip EULA
L30FCodasipWebsiteRV321.0RV32IMFCVerilogCodasip EULA
L50CodasipWebsiteRV321.0RV32IMCVerilogCodasip EULA
L50FCodasipWebsiteRV321.0RV32IMFCVerilogCodasip EULA
H50XCodasipWebsiteRV641.0RV64IMCVerilogCodasip EULA
H50XFCodasipWebsiteRV641.0RV64IMFDCVerilogCodasip EULA
A70XCodasipWebsiteRV641.0RV64IMAFDCVerilogCodasip EULA
DarkRISCVDarklifeGitHubRV32most of RV32IVerilogBSD
RPUDomipheus LabsGitHubRV32RV32IVHDLApache 2.0
RV01Stefano TonelloOpenCoresRV321.72.1, RV32IMVHDLLPGL
N22AndesWebsiteRV321.11RV32IMAC/EMAC + Andes V5/V5e ext.VerilogAndes FreeStart IPEA
N25FAndesWebsiteRV321.11RV32GC + Andes V5 ext.VerilogAndes Commercial License
D25FAndesWebsiteRV321.11RV32GCP + Andes V5 ext.VerilogAndes Commercial License
A25AndesWebsiteRV321.11RV32GCP + Sv32 + Andes V5 ext.VerilogAndes Commercial License
A25MPAndesWebsiteRV321.11RV32GCP + Sv32 + Andes V5 ext. + Multi-coreVerilogAndes Commercial License
NX25FAndesWebsiteRV641.11RV64GC + Andes V5 ext.VerilogAndes Commercial License
AX25AndesWebsiteRV641.11RV64GCP + Sv39/48 + Andes V5 ext.VerilogAndes Commercial License
AX25MPAndesWebsiteRV641.11RV64GCP + Sv39/48 + Andes V5 ext. + Multi-coreVerilogAndes Commercial License
A27AndesWebsiteRV321.11RV32GCP + Sv32 + Andes V5 ext.VerilogAndes Commercial License
A27L2AndesWebsiteRV321.11RV32GCP + Sv39/48 + Andes V5 ext.VerilogAndes Commercial License
AX27AndesWebsiteRV641.11RV64GCP + Sv39/48 + Andes V5 ext.VerilogAndes Commercial License
AX27L2AndesWebsiteRV641.11RV64GCP + Sv39/48 + Andes V5 ext.VerilogAndes Commercial License
NX27VAndesWebsiteRV641.11RV64GCPVVerilogAndes Commercial License
N45AndesWebsiteRV321.11RV32GC + Andes V5 ext.VerilogAndes Commercial License
D45AndesWebsiteRV321.11RV32GCP + Andes V5 ext.VerilogAndes Commercial License
NX45AndesWebsiteRV641.11RV64GC + Andes V5 ext.VerilogAndes Commercial License
A45AndesWebsiteRV321.11RV32GCP + Sv32 + Andes V5 ext.VerilogAndes Commercial License
AX45AndesWebsiteRV641.11RV64GCP + Sv39/48 + Andes V5 ext.VerilogAndes Commercial License
Instant SoCFPGA CoresWebsiteRV32RV32IMVHDLFree Non Commercial
TaigaReconfigurable Computing Lab, Simon Fraser UniversityGitLabRV32RV32IMASystemVerilogApache 2.0
MaestroJoão ChrisóstomoGitHubRV32RV32IVHDLMIT
XuanTie C910T-Head (Alibaba group)WebsiteRV641.10RV64GCV + SV39 + ISA Extension + Memory model Extension + multi-core & multi-cluster(16 cores maximum)VerilogAlibaba commercial license
XuanTie C906T-Head (Alibaba group)WebsiteRV641.10RV64IMA[FD]C[V] + SV39 + ISA Extension + Memory model ExtensionVerilogAlibaba commercial license
XuanTie E906T-Head (Alibaba group)WebsiteRV321.10RV32IMA[F][D]C + ISA ExtensionVerilogAlibaba commercial license
XuanTie E902T-Head (Alibaba group)WebsiteRV321.10RV32EMC/IMC/ECVerilogAlibaba commercial license
BM-310CloudBEARWebsiteRV321.10RV32IMCSystemVerilogCloudBEAR Commercial License
BI-350CloudBEARWebsiteRV321.10RV32IMAFC + multi-coreSystemVerilogCloudBEAR Commercial License
BI-651CloudBEARWebsiteRV641.10RV64GC + multi-coreSystemVerilogCloudBEAR Commercial License
BI-671CloudBEARWebsiteRV641.10RV64GC + multi-coreSystemVerilogCloudBEAR Commercial License
SSRVriscliteWebsite,GitHubRV321.10RV32IMCVerilogApache 2.0
TinyriscvBlue LiangGitHubRV322.1, RV32IVerilogApache 2.0
RSDrsd-develGitHubRV32RV32IMSystemVerilogApache 2.0
PlutoPQShieldWebsiteRV321.11RV32I[M][C] / RV32E[M][C] + Crypto FunctionsVerilogPQShield Commercial License
E2SiFiveWebsiteRV321.11RV32I(E)MAFC 2.2VerilogSiFive commercial license
S2SiFiveWebsiteRV641.11RV64GC 2.2VerilogSiFive commercial license
E3SiFiveWebsiteRV321.11RV32I(E)MAFDC 2.2VerilogSiFive commercial license
S5SiFiveWebsiteRV641.11RV64GC 2.2VerilogSiFive commercial license
U5SiFiveWebsiteRV641.11RV64GC 2.2VerilogSiFive commercial license
E7SiFiveWebsiteRV321.11RV32I(E)MAFDC 2.2VerilogSiFive commercial license
S7SiFiveWebsiteRV641.11RV64GC 2.2VerilogSiFive commercial license
U7SiFiveWebsiteRV641.11RV64GC 2.2VerilogSiFive commercial license
KronosSonal PintoGitHubRV32RV32ISystemVerilogApache 2.0
N100NucleiWebsiteRV321.11RV32ECVerilogNuclei commercial license
N200NucleiWebsiteRV321.11RV32IC(E)(M)(A)VerilogNuclei commercial license
N300NucleiWebsiteRV321.11RV32IMAC(F)(D)(P)VerilogNuclei commercial license
N600NucleiWebsiteRV321.11RV32IMAC(F)(D)(P)VerilogNuclei commercial license
NX600NucleiWebsiteRV321.11RV64IMAC(F)(D)(P)VerilogNuclei commercial license
UX600NucleiWebsiteRV641.11RV64IMAC(F)(D)(P) + MMU-SV39VerilogNuclei commercial license
WH32UC TechipWebsiteRV321.10RV32GCXChiselUC Techip Commercial License
WARP-VSteve Hoover, Redwood EDAGitHubRV32RV32I[M][F]TL-VerilogBSD
NEORV32Stephan NoltingGitHubRV321.12-draft2.2, RV32[I/E][M][A][C][Zfinx][Zicsr][Zifencei]VHDLBSD
SteelRafael CalcadaGitHubRV321.11RV32IZicsrVerilogMIT License
Klessydra-T13Digital Systems Lab at Sapienza University of RomeGitHubRV321.11RV32[I/E][M][A] + Kless-VectVHDL-2008Solderpad Hardware License v. 0.51
Klessydra-T03Digital Systems Lab at Sapienza University of RomeGitHubRV321.11RV32I[A]VHDL-2008Solderpad Hardware License v. 0.51
Klessydra-T02Digital Systems Lab at Sapienza University of RomeGitHubRV321.11RV32I[A]VHDL-2008Solderpad Hardware License v. 0.51
Klessydra-F03Digital Systems Lab at Sapienza University of RomeGitHubRV321.11RV32I[A]VHDL-2008Solderpad Hardware License v. 0.51
MYTH CoresMYTH Workshop studentsGitHubRV32 RV32ITL-VerilogBSD
Starsea_riscvStarseaGitHubRV32RV32IVerilogApache 2.0
VEGAC-DACWebsiteRV32, RV641.102.2, RV[32/64]IMA[F][D][C], Multi-coreBluespeccommercial
NutShellUCAS & ICT,CASGitHubRV641.11RV64IMACChiselMulan Permissive Software License V2
NOEL-VCobham GaislerWebsiteRV32,RV641.11RV32GC,RV64GCVHDLGPL, Commercial

SoC platforms

NameSupplierLinksCapabilityCoreLicense
Rocket ChipSiFive, UCB BARGitHub,SimulatorRV32RocketBSD
LowRISClowRISCGitHubRV32RV32IMBSD
PULPinoETH Zurich, Università di BolognaWebsite,GitHubRV32RI5CY, Zero-riscySolderpad Hardware License v. 0.51
PULPissimoETH Zurich, Università di BolognaWebsite,GitHubRV32RI5CY, Zero-riscySolderpad Hardware License v. 0.51
Ariane SoCETH Zurich, Università di BolognaWebsite,GitHubRV64ArianeSolderpad Hardware License v. 0.51
OPENPULPETH Zurich, Università di BolognaWebsite,GitHubRV32RI5CY, Zero-riscySolderpad Hardware License v. 0.51
HEROETH Zurich, Università di BolognaWebsite,GitHubRV32RI5CY, Zero-riscySolderpad Hardware License v. 0.51
OpenPiton + ArianePrinceton Parallel Group, ETH Zurich, Università di BolognaWebsite,GitHubRV64ArianeSolderpad Hardware License v. 0.51, BSD
BrieySpinalHDLGitHubRV32VexRiscvMIT
RiscyAleksandarKostovicGitHubRV64RV64IMIT
RavenRTimothyEdwards, mkkassem (efabless.com)GitHubRV32PicoRV32ISC
PicoSoCClifford WolfGitHubRV32PicoRV32ISC
IcicleGraham EdgecombeGitHubRV32RV32IISC
MIV RV32IMA L1 AHBMicrochipDocumentation, IDE, Development EnvironmentRV32Rocket RV32IMAApache 2.0
MIV RV32IMA L1 AXIMicrochipDocumentation, IDE, Development EnvironmentRV32Rocket RV32IMAApache 2.0
MIV RV32IMAF L1 AHBMicrochipDocumentation, IDE, Development EnvironmentRV32Rocket RV32IMAFApache 2.0
MIV RV32IMCMicrochipDocumentation, IDE, Development EnvironmentRV32Submicron RV32I, RV32IC, RV32IM, RV32IMCApache 2.0
FreeStart AE250AndesWebsiteRV32N22Andes FreeStart: Free for Evaluation
Standard AE250AndesWebsite, IDERV32N22Andes Commerical License
AE350AndesWebsite, IDERV32,RV64N25F, D25F, A25, A25MP, NX25, AX25, AX25MP, A27, A27L2, AX27, AX27L2, N45, D45, A45, NX45, AX45Andes Commerical License
SCR1 SDKSyntacoreGitHubRV32SCR1, SCRxSHL 2.0
ESPSLD Group, Columbia UniversityWebsite, GitHubRV64ArianeApache 2.0
ChipyardUCB BARGitHub,DocumentationRV64Rocket, BOOMBSD
PQSoCPQShieldWebsiteRV32PlutoPQShield Commercial License
KRZSonal PintoGitHubRV32KronosApache 2.0
IOb-SoCIObundleGitHubRV32PicoRV32MIT
SweRVolfCHIPS AllianceGitHubRV32SweRV EH1, SweRV EL2Apache 2.0
ServantOlof KindgrenGitHubRV32SERVISC
NEORV32 ProcessorStephan NoltingGitHubRV32NEORV32BSD
GRLIBCobham GaislerWebsiteRV32,RV64NOEL-VGPL, Commercial
LiteXEnjoy DigitalWebsite, GitHubRV32,RV64BlackParrot, CV32E40P, Minerva, PicoRV32, Rocket, SERV, VexRiscv (SMP supported with VexRiscv)BSD

SoCs

Include a chip if it has been fabricated and is either available for sale, available for preorder, or running production workloads internally, and if it has at least one RISC-V hard core (no FPGAs, but non-"SoC" products with controller cores are allowed).

NameSupplierLinksCoreISAOSDevkitAvailability
FE310-G000SiFiveDatasheetE31RV32IMACRTOSHiFive1public since 2016Q4
FE310-G002SiFiveProduct pageE31RV32IMACRTOSHiFive1 Rev Bannounced 2019Q1, available for preorder
Freedom U540SiFiveProduct pageU54 (4 cores), E51 (1 management core)RV64GC (application cores), RV64IMAC (management core)LinuxHiFive Unleashed development boardpublic since 2018Q1
GAP8GreenWaves TechnologiesProduct pagePULP / 1 + 8 RI5CYRV32IMC (+ Priviledged and custom ISA extensions)RTOSGAPuino development boardpublic since 2018Q1
K210KendryteProduct page, Datasheet, GitHubK210RV64GCLinuxKD233 development board, Sipeed MAIX/M1 development boardspublic since 2018Q4
RV32M1NXPReference Manual and DatasheetRI5CY + Zero RI5CY + Arm Cortex M4F + Arm Cortex M0+RV32IMCRTOSVEGAboardavailable for preorder as of 2018Q4
RavenRV32efablessDatasheet, GitHubPicoRV32RV32IMACRTOSRavenRV32 DevKitLimited Quantity
PolarFire SoCMicrochipProduct Page, IDE with Renode platformU54 (4 cores), E51 (management core)RV64GC(U54), RV64IMAC(E51)LinuxMicrochip Icicle Kit, HiFive Unleashed Expansion BoardIcicle Kit ES available Q3 2020, HiFive Unleased Expansion Board - Q2 2018
GD32VF103GigaDeviceProduct listing,DatasheetsBumblebee CoreRV32IMACRTOSGD32VF103V-EVAL, Longan Nano etc.Public since 2019Q4
CH572, CH573WCHProduct PageRISC-V3ARV32IMACRTOSpublic since 2019Q1
CH32F103WCHProduct Page DatasheetRISC-V3ARV32IMACRTOSpublic since 2020Q2
MiG-VHensoldt Cyber GmbHProduct PageCV6ARV64IMACTrentOSLimited