Awesome

Getting Started with FPGAs

Brought to you by the Open Source FPGA Foundation

<a href="https://www.chipsalliance.org/"><img src="https://user-images.githubusercontent.com/11302288/130822353-15fd731a-2621-4a65-b753-3fe7e7e303aa.png" alt="osfpga-logo" height="90"></a>

Led by Steve Hoover, founder of <a href="https://redwoodeda.com"><img src="https://user-images.githubusercontent.com/11302288/130831451-1c3b1541-06f2-4c0e-bbaf-8e0026db00c1.png" alt="redwoodeda-logo" height="50"></a> and member of the OSFPGA Education and Training Committee.

This free short-course takes you from your browser to your board in under an hour, using the Makerchip IDE.

You'll develop a simple counter circuit and a 7-segment display controller in Verilog or Transaction-Level Verilog. Then, if you have any of several supported FPGA boards, you’ll be able to run your design on your own FPGA. From there, the sky’s the limit.

Visit OSFPGA.org for further learning opportunities.

Supported Boards:

1. Zedboard Zynq-7000 ARM/FPGA SoC Development Board (Product Link)
2. EDGE Artix 7 FPGA Development Board (Product Link)
3. Basys 3 Artix-7 FPGA Trainer Board (Product Link)
4. Icebreaker FPGA (Product Link)
5. Nexys A7 (Product Link)

Start the course now! ...well, not quite now... still a work-in-progress.

Demos:

1. LED:

Counter Demo: https://makerchip.com/sandbox/0mZf5hLPG/0y8h64Z#

Output on Virtual Basys3 board:

Output on Virtual Edge Artix7 board:

2. Seven Segment Display:

Counter Demo: https://makerchip.com/sandbox/0mZf5hLPG/0zmh8rV

Output on Virtual Basys3 board:

Output on Virtual Edge Artix7 board:

Run on FPGA:

1. LED:

Output on Basys3 board:

Output on Edge Artix7 board:

2. Seven Segment Display:

Output on Basys3 board:

Output on Edge Artix7 board:

Credits

Course creators:

• Steve Hoover, founder Redwood EDA, LLC
• Mayank Kabra, student at the International Institute of Information Technology, Bangalore
• Shivani Shah, student at the International Institute of Information Technology, Bangalore

Thanks also to Bala Dhinesh for providing the vitual lab environment, with support from: