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fpga-examples

These are some of the Verilog examples from the book "Designing Video Game Hardware in Verilog" ported to CRT monitor timing and tested against the IceStorm tools.

Installation

On Ubuntu:

sudo apt-get install yosys arachne-pnr
git clone https://github.com/sehugg/fpga-examples
cd fpga-examples/ice40

To syntheisize and upload to the FPGA:

make starfield.bin
iceprog starfield.bin

To connect the FPGA to a composite output, you might need to make a 2-bit DAC out of resistors, like this one.

License

All files in this repo are licensed under CC0 (public domain)