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RISC-V Debug task group

The RISC-V Debug Task Group was established to propose specifications for debug on RISC-V implementations. The scope of the group includes run-control and trace debug, but the current focus is to agree upon a standard for run-control debug.

The group is currently chaired by Megan Wachs (SiFive Inc).

As of the 22nd March 2017, future notes, slides, and discussions will be moved to the RISC-V members workspace.

Run-control debug

Run-control debug allows you to halt, step, resume, to set breakpoints, and to access GPRs+CSRs+memory. There have been two main proposals for run-control, and much of the group's time has been spent understanding the differences and trade-offs between these two approaches, with the goal of producing a single unified specification.

Working draft

The debug specification is developed in the riscv-debug-spec Github repository. PDF versions are periodically generated and published here.

Meetings

In addition to discussions on the mailing list, the group has held a series of meetings. As of the 22nd March 2017, future notes, slides, and discussions will be moved to the RISC-V members workspace.

Previous

• 22nd March, 2017. Slides (not available). Notes.
• 15th March, 2017. Slides. Notes.
• 8th March, 2017. Slides. Notes.
• 1st March, 2017. Slides. Notes.
• 22nd February, 2017. Slides. Notes.
• 15th February, 2017. Slides. Notes.
• 8th Februrary, 2017. Slides. Notes.
• 1st February, 2017. Slides. Notes.
• 25th January, 2017. Slides. Notes.
• 18th January, 2017. Slides. Notes.
• 11th January, 2017. Slides. Notes.
• 5th January, 2017. Slides. Notes.
• 21st December, 2016. Slides. Notes.
• 15th December, 2016. Slides. Notes.
• 7th December, 2016. Slides. Notes.
• 30th November, 2016. Slides. Notes.

Historical specification development

Previously, the task group went through detailed discussion on a number of different approaches. The key documents produced in that process are linked below.

• The 'Instruction' design.
• The 'Direct' design. The primary author of this proposal has also started work on a version that hopes to combine the best of both proposals.
• Tim Newsome's comparison between the two approaches.
• Stefan Wallentowitz and Alex Bradbury produced a presentation aiming to summarise proposals so far, briefly survey what other architectures do for run-control debug, and propose a path towards a unified specification. They went on to give a more detailed proposal for an approach with a base memory map, with optional instruction feeding.
• The options for interfaces were put to a vote, which resulted in the decision to pursue a spec with a unified abstract interface. Once the costs of translating from the abstract interface to instruction feeding are better understood, the group may agree that providing two optional interfaces is preferable.