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TMS9918A Video Card for RC2014

This is a TMS9918A-based video card for RC2014 and SC1xx computers based on the Z80 and Z180 processors. The TMS9918A produces NTSC composite graphics and was used in the TI-99/4A, MSX, ColecoVision, and Sega SG-1000. Enhanced derivatives were used in later MSX2 computers, the Sega Master System, and the Sega Genesis.

This board is based on a circuit described by Tom LeMense for interfacing the TMS9918A with SRAM. I started with his schematics, added port address decoding and laid out the circuit on an RC2014 module.

This board can be configured to use the same ports as the MSX or ColecoVision, so it's possible to run some software from these systems, such as ColecoVision games and MSX-BASIC.

Assembly Instructions

Ready-to-Assemble Kits are available on Tindie. These are sold by Michael Kamprath with my permission. However, I offer no warranty or guarantee of support.

Gerbers for the PCB are available. I highly recommend JLCPCB for PCB fabrication. Alternatively, boards can be ordered from the shared project on OSH Park.

Refer to the schematic, the picture below, and the bill of materials below for assembly guidance.

TMS9918A PCB

Bill of Materials

ComponentDescription
PCBrc9918 PCB
U174HCT32 quad OR gate
U274HCT138 3-8 line decoder
U3TMS9918A video chip
U474HCT04 hex inverter
U5, U6, U774HCT574 octal flip-flops
U8AS6C62256-55PCN, HM62256BLP-7, UM61M256K-15, or other compatible 32KB SRAM. I have put two footprints so either a wide or narrow DIP-28 will work as long as the pin-out is the same.
R175 ohm resistor
R2130 ohm resistor*
R3470 ohm resistor
L1Ferrite bead (FBA04HA600VB-00 or similar)
Y110.73866MHz crystal (LFXTAL029962REEL or similar)
C1, C216pf ceramic or MLCC capacitor
C3-C110.1uf ceramic or MLCC capacitor
Q1NPN transistor (2N4401 or similar)
J1 & J52x40 pin right angle header, with pins from upper row removed to fit J5
J2KLPX-0848A-2-Y RCA connector
J42x8 pin straight header and 1 jumper block
J62x3 pin straight header and 1 jumper block
J71x4 pin straight header and 1 jumper block
JP11x3 pin straight header and 1 jumper block
JP21x3 pin straight header and 1 jumper block
JP41x3 pin straight header and 1 jumper block
D1REV4 only: Schottky diode (BAT81 or similar)

* R2 controls the voltage of the NTSC signal, and therefore the brightness of the picture. Tom Lemense's original circuit specified a 0 ohm resistor (i.e., wire link), but based on my measurements this will result in a voltage higher than NTSC spec. 130 ohm yields a voltage close to NTSC spec. Higher values will be dimmer and lower values will be brighter.

Aside from the board and the TMS9918A itself, all parts are available from Mouser and probably other suppliers as well.

Recommended Jumper Configurations

The following jumper configurations are recommended for compatibility with unmodified software for classic machines using the TMS9918A. The function of each jumper is described in more detail in the section following the table.

The provided example programs automatically detect the TMS9918A on any of the following ports, so no change to the example code is necessary.

ColecoVision / SG-1000MSXSord M5Tatung Einstein
PortsB0-BF*98/9910/11**08/09
J4 (A7-A5)2nd from right (101)3rd from right (100)Far left (000)Far left (000)
J6 (A4)Right (1)Right (1)Right (1)Middle (0)
JP2 (A3)Lower (X)Upper (1)Lower (X)Upper (1)
JP1 (A2-A1)Lower (XX)Upper (00)Upper (00)Upper (00)
JP4 (Interrupt)Lower (NMI)Upper (INT)Lower (NMI)Upper (INT)

* On a real ColecoVision, the entire A0-BF range is assigned to the TMS9918A, but since all known games only use ports BE and BF, address decoding can be limited to B0-BF. If you want to decode the full range A0-BF, place J6 in the left position instead.

** On a real Sord M5, only ports 10 and 11 are assigned to the TMS9918A, but since the address decoding for bit 3 can only be set to 1 or don't care, this configuration assigns both 10/11 and 18/19 to the TMS9918A.

Note: This board cannot decode the port addresses used by the MTX (not to be confused with MSX) and Spectravideo SV-3xx machines, so it not compatible with unmodified software for these machines.

Jumper Descriptions

Port Address Jumpers

The Z80 uses 8 bit I/O addresses. Four jumpers on this board control which I/O addresses the TMS9918A is assigned to. Each jumper controls one or more bits within the address:

Interrupt Configuration Jumper

The jumper JP4 is used to determine whether to send the TMS9918A interrupt signal to either INT (upper position) or NMI (lower position) on the RC2014 bus.

Warning: The TMS9918A does not have an open collector interrupt output. If you have other cards that make use of the /INT line, such as the SIO card that comes with the RC2014, it's possible the TMS9918A will fight with other chips for control of the interrupt line, which will prevent proper operation and could potentially damage both chips. For safety, it is recommended to use NMI instead of INT in this case. REV4 of the board adds a diode to prevent hardware damage; however, if multiple peripherals are generating interrupts, it could still lead to unpredictable software behavior.

Clock Header

The optional J7 header has pins (from left to right) for RC2014 CLK1 (REV4 only), CPUCLK, GROMCLK, EXTVDP, and GND. No jumper block should normally be placed on this header.

These pins can be used as follows:

Resources

Other Boards

License

Copyright 2018-2020 J.B. Langston

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.