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OpenPiton Design Benchmark

OpenPiton Design Benchmark adapted from OpenPiton. All design benchmarks were generated using Tursi

Publication

OPDB paper early access: https://ieeexplore.ieee.org/document/9481916

Georgios Tziantzioulis, Ting-Jung Chang, Jonathan Balkind, Jinzheng Tu, Fei Gao and David Wentzlaff,
"OPDB: A Scalable and Modular Design Benchmark",
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2021.3096794.

Find out more

• More information about OpenPiton is available at www.openpiton.org
• Follow us on Twitter!
• Get help from others by joining our Google Group
• Keep up-to-date with the latest releases at the OpenPiton Blog
• Floorplan and sdc files
• Licenses

Benchmark

The following table presents which modules from OpenPiton and other open-source projects are included on OPDB, the name of the top level module for each pickled module, and which attributes affect each module.

Dynamic node top module

The top module of dynamic node depends on the network topology:

Core design instances

As evaluating and presenting hundreds of design instances is impractical, we suggest to OPDB user to focus on the set of design benchmarks that map to the Piton processor.

A list of the suggested pickled designs can be found here.

Pregenerated BLIF files for the suggested pickled designs can be found here.

Detailed information regarding the Piton processor can be found here

Configuration naming convention

<attr1_id>_<attr1_val1>_..._<attr1_valM>__...__<attrN_id>_<attrN_val1>_..._<attrN_valM>

Organization

+ modules/
 \
  + <module name>
  |\
  | + <configuration>
  | |\
  | | + <module name>.pickle.v
  | | + floorplan.json
  | |
  | + <configuration>
  ...
  |
  + <module name>

Configuration folder

Each configuration folder will contain a pickled file of verilog code and a floorplan json file. The floorplan json file will provide the top level module and additional information.

Floorplan and sdc files

Specific configurations include floorplan and sdc files. The current ones are:

• modules/dynamic_node_2dmesh/NETWORK_2dmesh
• modules/sparc_core/L1I_16384_4__L1D_8192_4

Original codebases

• OpenPiton

• MIAOW

• FFT

• GNG

Licenses

For details on the license of the MIAOW GPGPU see here

For details on the license of the OpenSPARC T1 core see here

The Ariane RISC-V CPU is licensed under the SolderPad Hardware License

The PicoRV32 core is licensed under the ISC license

The GNG core is licensed under LGPL 2.1

The FFT core is licensed under LGPL 3

The OpenPiton project is licensed under the following 3-clause BSD license:

Copyright (c) Princeton University
All rights reserved.

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
    * Neither the name of Princeton University nor the names of its contributors may be used to endorse or promote products derived from this software without specific prior written permission.
    
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