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CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices

Alessandro Capotondi*, Manuele Rusci**, Marco Fariselli**, Luca Benini**

*: Università di Modena e Reggio-Emilia, **: Università di Bologna

Keyworks

TinyML; Edge Computing; ARM Cortex-M; STM32H7; STM32F7; STM32L4; STM32F4

Brief

Running inference tasks at the edge of the sensing infrastructure minimizes the user's network bandwidth and improves the response time. When envisioning battery-powered IoT devices with smart capabilities, the limited energy budget puts constraints on the design of computing platforms for edge computing. Microcontroller Units (MCUs), which dominate the low-power spectrum of the computing platforms, typically feature limited memory resources (up to few MB of FLASH and below 1 MB of on-chip RAM) and lack floating-point hardware support. Hence, the deployment of high computational and memory requirements of deep learning workloads on edge devices results exceptionally challenging.

Low-precision integer arithmetic is a necessary ingredient for enabling Deep Learning inference on tiny and resource-constrained IoT edge devices. The approach described by Rusci et al. leveraged heterogeneous mixed-precision to deploy deep inference networks on tiny MCUs. The proposed technique aims at cutting the number of bits of individual weight or activation tensors below 8 bits up to fit the memory constraints and, at the same time, paying a limited accuracy drop if compared to the full-precision network. However, despite the numerous works addressing quantization on the server-side, no solution is provided for the deployment phase, especially if considering the mixed-precision sub-byte scenario. To tackle this problem, we present CMix-NN, an open-source mixed-precision library for quantized neural networks deployment on microcontroller targets. Differently, from state-of-the-art deployment solutions available for MCUs, our library supports convolutional kernels with any bit precision* in the set of 8, 4 and 2 bits, for any of the convolution operands.

Papers

Please, cite the following papers if you are going to use this library.

Content

The CMix-NN is a C inference library for ARM Cortex-M MCU:

On-going activities and Expected Contributions

Supported Layers

FunctionIn DatatypeOut DatatypeWeights DatatypeQuantization FlavorFilename
arm_convolve_HWC_u2_u2_u22-bit2-bit2-bitPLarm_convolve_HWC_u2_u2_u2.c
arm_convolve_HWC_u2_u2_u2_icn2-bit2-bit2-bitPL+ICNarm_convolve_HWC_u2_u2_u2_icn.c
arm_convolve_HWC_u2_u2_u2_PACT_CH_icn2-bit2-bit2-bitPC+ICNarm_convolve_HWC_u2_u2_u2_PACT_CH_icn.c
arm_convolve_HWC_u2_u2_u42-bit2-bit4-bitPLarm_convolve_HWC_u2_u2_u4.c
arm_convolve_HWC_u2_u2_u4_icn2-bit2-bit4-bitPL+ICNarm_convolve_HWC_u2_u2_u4_icn.c
arm_convolve_HWC_u2_u2_u4_PACT_CH_icn2-bit2-bit4-bitPC+ICNarm_convolve_HWC_u2_u2_u4_PACT_CH_icn.c
arm_convolve_HWC_u2_u2_u82-bit2-bit8-bitPLarm_convolve_HWC_u2_u2_u8.c
arm_convolve_HWC_u2_u2_u8_icn2-bit2-bit8-bitPL+ICNarm_convolve_HWC_u2_u2_u8_icn.c
arm_convolve_HWC_u2_u2_u8_PACT_CH_icn2-bit2-bit8-bitPC+ICNarm_convolve_HWC_u2_u2_u8_PACT_CH_icn.c
arm_convolve_HWC_u2_u4_u22-bit4-bit2-bitPLarm_convolve_HWC_u2_u4_u2.c
arm_convolve_HWC_u2_u4_u2_icn2-bit4-bit2-bitPL+ICNarm_convolve_HWC_u2_u4_u2_icn.c
arm_convolve_HWC_u2_u4_u2_PACT_CH_icn2-bit4-bit2-bitPC+ICNarm_convolve_HWC_u2_u4_u2_PACT_CH_icn.c
arm_convolve_HWC_u2_u4_u42-bit4-bit4-bitPLarm_convolve_HWC_u2_u4_u4.c
arm_convolve_HWC_u2_u4_u4_icn2-bit4-bit4-bitPL+ICNarm_convolve_HWC_u2_u4_u4_icn.c
arm_convolve_HWC_u2_u4_u4_PACT_CH_icn2-bit4-bit4-bitPC+ICNarm_convolve_HWC_u2_u4_u4_PACT_CH_icn.c
arm_convolve_HWC_u2_u4_u82-bit4-bit8-bitPLarm_convolve_HWC_u2_u4_u8.c
arm_convolve_HWC_u2_u4_u8_icn2-bit4-bit8-bitPL+ICNarm_convolve_HWC_u2_u4_u8_icn.c
arm_convolve_HWC_u2_u4_u8_PACT_CH_icn2-bit4-bit8-bitPC+ICNarm_convolve_HWC_u2_u4_u8_PACT_CH_icn.c
arm_convolve_HWC_u2_u8_u22-bit8-bit2-bitPLarm_convolve_HWC_u2_u8_u2.c
arm_convolve_HWC_u2_u8_u2_icn2-bit8-bit2-bitPL+ICNarm_convolve_HWC_u2_u8_u2_icn.c
arm_convolve_HWC_u2_u8_u2_PACT_CH_icn2-bit8-bit2-bitPC+ICNarm_convolve_HWC_u2_u8_u2_PACT_CH_icn.c
arm_convolve_HWC_u2_u8_u42-bit8-bit4-bitPLarm_convolve_HWC_u2_u8_u4.c
arm_convolve_HWC_u2_u8_u4_icn2-bit8-bit4-bitPL+ICNarm_convolve_HWC_u2_u8_u4_icn.c
arm_convolve_HWC_u2_u8_u4_PACT_CH_icn2-bit8-bit4-bitPC+ICNarm_convolve_HWC_u2_u8_u4_PACT_CH_icn.c
arm_convolve_HWC_u2_u8_u82-bit8-bit8-bitPLarm_convolve_HWC_u2_u8_u8.c
arm_convolve_HWC_u2_u8_u8_icn2-bit8-bit8-bitPL+ICNarm_convolve_HWC_u2_u8_u8_icn.c
arm_convolve_HWC_u2_u8_u8_PACT_CH_icn2-bit8-bit8-bitPC+ICNarm_convolve_HWC_u2_u8_u8_PACT_CH_icn.c
arm_convolve_HWC_u4_u2_u24-bit2-bit2-bitPLarm_convolve_HWC_u4_u2_u2.c
arm_convolve_HWC_u4_u2_u2_icn4-bit2-bit2-bitPL+ICNarm_convolve_HWC_u4_u2_u2_icn.c
arm_convolve_HWC_u4_u2_u2_PACT_CH_icn4-bit2-bit2-bitPC+ICNarm_convolve_HWC_u4_u2_u2_PACT_CH_icn.c
arm_convolve_HWC_u4_u2_u44-bit2-bit4-bitPLarm_convolve_HWC_u4_u2_u4.c
arm_convolve_HWC_u4_u2_u4_icn4-bit2-bit4-bitPL+ICNarm_convolve_HWC_u4_u2_u4_icn.c
arm_convolve_HWC_u4_u2_u4_PACT_CH_icn4-bit2-bit4-bitPC+ICNarm_convolve_HWC_u4_u2_u4_PACT_CH_icn.c
arm_convolve_HWC_u4_u2_u84-bit2-bit8-bitPLarm_convolve_HWC_u4_u2_u8.c
arm_convolve_HWC_u4_u2_u8_icn4-bit2-bit8-bitPL+ICNarm_convolve_HWC_u4_u2_u8_icn.c
arm_convolve_HWC_u4_u2_u8_PACT_CH_icn4-bit2-bit8-bitPC+ICNarm_convolve_HWC_u4_u2_u8_PACT_CH_icn.c
arm_convolve_HWC_u4_u4_u24-bit4-bit2-bitPLarm_convolve_HWC_u4_u4_u2.c
arm_convolve_HWC_u4_u4_u2_icn4-bit4-bit2-bitPL+ICNarm_convolve_HWC_u4_u4_u2_icn.c
arm_convolve_HWC_u4_u4_u2_PACT_CH_icn4-bit4-bit2-bitPC+ICNarm_convolve_HWC_u4_u4_u2_PACT_CH_icn.c
arm_convolve_HWC_u4_u4_u44-bit4-bit4-bitPLarm_convolve_HWC_u4_u4_u4.c
arm_convolve_HWC_u4_u4_u4_icn4-bit4-bit4-bitPL+ICNarm_convolve_HWC_u4_u4_u4_icn.c
arm_convolve_HWC_u4_u4_u4_PACT_CH_icn4-bit4-bit4-bitPC+ICNarm_convolve_HWC_u4_u4_u4_PACT_CH_icn.c
arm_convolve_HWC_u4_u4_u84-bit4-bit8-bitPLarm_convolve_HWC_u4_u4_u8.c
arm_convolve_HWC_u4_u4_u8_icn4-bit4-bit8-bitPL+ICNarm_convolve_HWC_u4_u4_u8_icn.c
arm_convolve_HWC_u4_u4_u8_PACT_CH_icn4-bit4-bit8-bitPC+ICNarm_convolve_HWC_u4_u4_u8_PACT_CH_icn.c
arm_convolve_HWC_u4_u8_u24-bit8-bit2-bitPLarm_convolve_HWC_u4_u8_u2.c
arm_convolve_HWC_u4_u8_u2_icn4-bit8-bit2-bitPL+ICNarm_convolve_HWC_u4_u8_u2_icn.c
arm_convolve_HWC_u4_u8_u2_PACT_CH_icn4-bit8-bit2-bitPC+ICNarm_convolve_HWC_u4_u8_u2_PACT_CH_icn.c
arm_convolve_HWC_u4_u8_u44-bit8-bit4-bitPLarm_convolve_HWC_u4_u8_u4.c
arm_convolve_HWC_u4_u8_u4_icn4-bit8-bit4-bitPL+ICNarm_convolve_HWC_u4_u8_u4_icn.c
arm_convolve_HWC_u4_u8_u4_PACT_CH_icn4-bit8-bit4-bitPC+ICNarm_convolve_HWC_u4_u8_u4_PACT_CH_icn.c
arm_convolve_HWC_u4_u8_u84-bit8-bit8-bitPLarm_convolve_HWC_u4_u8_u8.c
arm_convolve_HWC_u4_u8_u8_icn4-bit8-bit8-bitPL+ICNarm_convolve_HWC_u4_u8_u8_icn.c
arm_convolve_HWC_u4_u8_u8_PACT_CH_icn4-bit8-bit8-bitPC+ICNarm_convolve_HWC_u4_u8_u8_PACT_CH_icn.c
arm_convolve_HWC_u8_u2_u28-bit2-bit2-bitPLarm_convolve_HWC_u8_u2_u2.c
arm_convolve_HWC_u8_u2_u2_icn8-bit2-bit2-bitPL+ICNarm_convolve_HWC_u8_u2_u2_icn.c
arm_convolve_HWC_u8_u2_u2_PACT_CH_icn8-bit2-bit2-bitPC+ICNarm_convolve_HWC_u8_u2_u2_PACT_CH_icn.c
arm_convolve_HWC_u8_u2_u48-bit2-bit4-bitPLarm_convolve_HWC_u8_u2_u4.c
arm_convolve_HWC_u8_u2_u4_icn8-bit2-bit4-bitPL+ICNarm_convolve_HWC_u8_u2_u4_icn.c
arm_convolve_HWC_u8_u2_u4_PACT_CH_icn8-bit2-bit4-bitPC+ICNarm_convolve_HWC_u8_u2_u4_PACT_CH_icn.c
arm_convolve_HWC_u8_u2_u88-bit2-bit8-bitPLarm_convolve_HWC_u8_u2_u8.c
arm_convolve_HWC_u8_u2_u8_icn8-bit2-bit8-bitPL+ICNarm_convolve_HWC_u8_u2_u8_icn.c
arm_convolve_HWC_u8_u2_u8_PACT_CH_icn8-bit2-bit8-bitPC+ICNarm_convolve_HWC_u8_u2_u8_PACT_CH_icn.c
arm_convolve_HWC_u8_u4_u28-bit4-bit2-bitPLarm_convolve_HWC_u8_u4_u2.c
arm_convolve_HWC_u8_u4_u2_icn8-bit4-bit2-bitPL+ICNarm_convolve_HWC_u8_u4_u2_icn.c
arm_convolve_HWC_u8_u4_u2_PACT_CH_icn8-bit4-bit2-bitPC+ICNarm_convolve_HWC_u8_u4_u2_PACT_CH_icn.c
arm_convolve_HWC_u8_u4_u48-bit4-bit4-bitPLarm_convolve_HWC_u8_u4_u4.c
arm_convolve_HWC_u8_u4_u4_icn8-bit4-bit4-bitPL+ICNarm_convolve_HWC_u8_u4_u4_icn.c
arm_convolve_HWC_u8_u4_u4_PACT_CH_icn8-bit4-bit4-bitPC+ICNarm_convolve_HWC_u8_u4_u4_PACT_CH_icn.c
arm_convolve_HWC_u8_u4_u88-bit4-bit8-bitPLarm_convolve_HWC_u8_u4_u8.c
arm_convolve_HWC_u8_u4_u8_icn8-bit4-bit8-bitPL+ICNarm_convolve_HWC_u8_u4_u8_icn.c
arm_convolve_HWC_u8_u4_u8_PACT_CH_icn8-bit4-bit8-bitPC+ICNarm_convolve_HWC_u8_u4_u8_PACT_CH_icn.c
arm_convolve_HWC_u8_u8_u28-bit8-bit2-bitPLarm_convolve_HWC_u8_u8_u2.c
arm_convolve_HWC_u8_u8_u2_icn8-bit8-bit2-bitPL+ICNarm_convolve_HWC_u8_u8_u2_icn.c
arm_convolve_HWC_u8_u8_u2_PACT_CH_icn8-bit8-bit2-bitPC+ICNarm_convolve_HWC_u8_u8_u2_PACT_CH_icn.c
arm_convolve_HWC_u8_u8_u48-bit8-bit4-bitPLarm_convolve_HWC_u8_u8_u4.c
arm_convolve_HWC_u8_u8_u4_icn8-bit8-bit4-bitPL+ICNarm_convolve_HWC_u8_u8_u4_icn.c
arm_convolve_HWC_u8_u8_u4_PACT_CH_icn8-bit8-bit4-bitPC+ICNarm_convolve_HWC_u8_u8_u4_PACT_CH_icn.c
arm_convolve_HWC_u8_u8_u88-bit8-bit8-bitPLarm_convolve_HWC_u8_u8_u8.c
arm_convolve_HWC_u8_u8_u8_icn8-bit8-bit8-bitPL+ICNarm_convolve_HWC_u8_u8_u8_icn.c
arm_convolve_HWC_u8_u8_u8_PACT_CH_icn8-bit8-bit8-bitPC+ICNarm_convolve_HWC_u8_u8_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u22-bit2-bit2-bitPLarm_depthwise_separable_conv_HWC_u2_u2_u2.c
arm_depthwise_separable_conv_HWC_u2_u2_u2_icn2-bit2-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u2_u2_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u2_PACT_CH_icn2-bit2-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u2_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u42-bit2-bit4-bitPLarm_depthwise_separable_conv_HWC_u2_u2_u4.c
arm_depthwise_separable_conv_HWC_u2_u2_u4_icn2-bit2-bit4-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u2_u4_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u4_PACT_CH_icn2-bit2-bit4-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u2_u4_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u82-bit2-bit8-bitPLarm_depthwise_separable_conv_HWC_u2_u2_u8.c
arm_depthwise_separable_conv_HWC_u2_u2_u8_icn2-bit2-bit8-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u2_u8_icn.c
arm_depthwise_separable_conv_HWC_u2_u2_u8_PACT_CH_icn2-bit2-bit8-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u2_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u22-bit4-bit2-bitPLarm_depthwise_separable_conv_HWC_u2_u4_u2.c
arm_depthwise_separable_conv_HWC_u2_u4_u2_icn2-bit4-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u4_u2_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u2_PACT_CH_icn2-bit4-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u4_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u42-bit4-bit4-bitPLarm_depthwise_separable_conv_HWC_u2_u4_u4.c
arm_depthwise_separable_conv_HWC_u2_u4_u4_icn2-bit4-bit4-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u4_u4_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u4_PACT_CH_icn2-bit4-bit4-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u4_u4_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u82-bit4-bit8-bitPLarm_depthwise_separable_conv_HWC_u2_u4_u8.c
arm_depthwise_separable_conv_HWC_u2_u4_u8_icn2-bit4-bit8-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u4_u8_icn.c
arm_depthwise_separable_conv_HWC_u2_u4_u8_PACT_CH_icn2-bit4-bit8-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u4_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u22-bit8-bit2-bitPLarm_depthwise_separable_conv_HWC_u2_u8_u2.c
arm_depthwise_separable_conv_HWC_u2_u8_u2_icn2-bit8-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u8_u2_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u2_PACT_CH_icn2-bit8-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u8_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u42-bit8-bit4-bitPLarm_depthwise_separable_conv_HWC_u2_u8_u4.c
arm_depthwise_separable_conv_HWC_u2_u8_u4_icn2-bit8-bit4-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u8_u4_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u4_PACT_CH_icn2-bit8-bit4-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u8_u4_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u82-bit8-bit8-bitPLarm_depthwise_separable_conv_HWC_u2_u8_u8.c
arm_depthwise_separable_conv_HWC_u2_u8_u8_icn2-bit8-bit8-bitPL+ICNarm_depthwise_separable_conv_HWC_u2_u8_u8_icn.c
arm_depthwise_separable_conv_HWC_u2_u8_u8_PACT_CH_icn2-bit8-bit8-bitPC+ICNarm_depthwise_separable_conv_HWC_u2_u8_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u24-bit2-bit2-bitPLarm_depthwise_separable_conv_HWC_u4_u2_u2.c
arm_depthwise_separable_conv_HWC_u4_u2_u2_icn4-bit2-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u2_u2_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u2_PACT_CH_icn4-bit2-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u2_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u44-bit2-bit4-bitPLarm_depthwise_separable_conv_HWC_u4_u2_u4.c
arm_depthwise_separable_conv_HWC_u4_u2_u4_icn4-bit2-bit4-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u2_u4_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u4_PACT_CH_icn4-bit2-bit4-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u2_u4_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u84-bit2-bit8-bitPLarm_depthwise_separable_conv_HWC_u4_u2_u8.c
arm_depthwise_separable_conv_HWC_u4_u2_u8_icn4-bit2-bit8-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u2_u8_icn.c
arm_depthwise_separable_conv_HWC_u4_u2_u8_PACT_CH_icn4-bit2-bit8-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u2_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u24-bit4-bit2-bitPLarm_depthwise_separable_conv_HWC_u4_u4_u2.c
arm_depthwise_separable_conv_HWC_u4_u4_u2_icn4-bit4-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u4_u2_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u2_PACT_CH_icn4-bit4-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u4_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u44-bit4-bit4-bitPLarm_depthwise_separable_conv_HWC_u4_u4_u4.c
arm_depthwise_separable_conv_HWC_u4_u4_u4_icn4-bit4-bit4-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u4_u4_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u4_PACT_CH_icn4-bit4-bit4-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u4_u4_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u84-bit4-bit8-bitPLarm_depthwise_separable_conv_HWC_u4_u4_u8.c
arm_depthwise_separable_conv_HWC_u4_u4_u8_icn4-bit4-bit8-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u4_u8_icn.c
arm_depthwise_separable_conv_HWC_u4_u4_u8_PACT_CH_icn4-bit4-bit8-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u4_u8_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u8_u24-bit8-bit2-bitPLarm_depthwise_separable_conv_HWC_u4_u8_u2.c
arm_depthwise_separable_conv_HWC_u4_u8_u2_icn4-bit8-bit2-bitPL+ICNarm_depthwise_separable_conv_HWC_u4_u8_u2_icn.c
arm_depthwise_separable_conv_HWC_u4_u8_u2_PACT_CH_icn4-bit8-bit2-bitPC+ICNarm_depthwise_separable_conv_HWC_u4_u8_u2_PACT_CH_icn.c
arm_depthwise_separable_conv_HWC_u4_u8_u44-bit8-bit4-bitPLarm_depthwise_separable_conv_HWC_u4_u8_u4.c
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