Awesome
<h1 align="center">🧪 Fault</h1> <p align="center"> <a href="https://developer.apple.com/swift/"><img src="https://img.shields.io/badge/Swift-5.8-orange?logo=swift" alt="Swift 5.8 or higher"/></a> <a href="https://fault.readthedocs.io/en/latest/"><img src="https://readthedocs.org/projects/fault/badge" alt="Read the Docs"/></a> <a href="https://nixos.org/"><img src="https://img.shields.io/static/v1?logo=nixos&logoColor=white&label=&message=Built%20with%20Nix&color=41439a"  alt="Built with Nix"/></a> </p> ÂFault is a complete open source design for testing (DFT) Solution that includes automatic test pattern generation for netlists, scan chain stitching, synthesis scripts and a number of other convenience features.
Installation and Usage
See the documentation at https://fault.readthedocs.io.
Copyright & Licensing
All rights reserved ©2018-2024 The American University in Cairo and other contributors. Fault is available under the Apache 2.0 License: See License.
SOFTWARE INCLUDED WITH SOME FAULT DISTRIBUTIONS, I.E. ATALANTA AND PODEM, WHILE FREE TO DISTRIBUTE, ARE PROPRIETARY, AND MAY NOT BE USED FOR COMMERCIAL PURPOSES.
References
- Z. Navabi, Digital System Test and Testable Design : Using Hdl Models and Architectures. 2010;2011;. DOI: 10.1007/978-1-4419-7548-5. Book
- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design Processing Toolkit for Verilog HDL, 11th International Symposium on Applied Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer Science, Vol.9040/2015, pp.451-460, April 2015. Paper